// route_fcm.v
// Board-specific routing to pins for FCM/DFE system
// $Id$
// Larry Doolittle, LBNL

// llc-suite Copyright (c) 2004, The Regents of the University of
// California, through Lawrence Berkeley National Laboratory (subject
// to receipt of any required approvals from the U.S. Dept. of Energy).
// All rights reserved.

// Your use of this software is pursuant to a "BSD-style" open
// source license agreement, the text of which is in license.txt
// (md5sum a1e0e81c78f6eba050b0e96996f49fd5) that should accompany
// this file.  If the license agreement is not there, or if you
// have questions about the license, please contact Berkeley Lab's
// Technology Transfer Department at TTD@lbl.gov referring to
// "llc-suite (LBNL Ref CR-1988)"

`timescale 1ns / 1ns


module route_fcm(
	output [7:0] TTLTRIG,       // pin 1
	input  LRC_1,               // pin 3
	input  LRC_2,               // pin 4
	input  PREPULSE,            // pin 5
	input  RF_ON,               // pin 6
	output rf_on_,              // interconnect
	output daov_,               // interconnect
	output dbov_,               // interconnect
	output dcov_,               // interconnect
	output ddov_,               // interconnect
	output [1:0] lrc_slot,      // interconnect
	output il_stat_             // interconnect
);

assign daov_ = 0;
assign dbov_ = 0;
assign dcov_ = 0;
assign ddov_ = 0;
assign il_stat_ = 1;

assign lrc_slot = {LRC_2,LRC_1};
wire left = (lrc_slot == 2'b00);
assign TTLTRIG = left ? {3'bzzz, RF_ON, ~PREPULSE, 3'bzzz} : 8'bzzzzzzzz;
assign rf_on_ = RF_ON;

endmodule