HierarchyFilesModulesSignalsTasksFunctionsHelp
// Machine generated from config_cruncher
`timescale 1ns / 1ns
[Up: config_rom rom]
module config_romxIndex(
	input [3:0] address,
	output reg [7:0] data
);
always @(address) case(address)
	4'h0: data =  85;    //  0x55  magic
	4'h1: data =   1;    //  0x01  LLRF
	4'h2: data =   4;    //  0x04  year
	4'h3: data =   5;    //  0x05  month
	4'h4: data =  19;    //  0x13  day
	4'h5: data =   1;    //  0x01  revision
	4'h6: data =   1;    //  0x01  user (ldoolitt)
	4'h7: data =   2;    //  0x02  tool
	4'h8: data =  12;    //  0x0c  ADC bits
	4'h9: data =   9;    //  0x09  history address bits
	4'ha: data =   1;    //  0x01  board type
	4'hb: data =   0;    //  0x00  pipeline
	4'hc: data =   0;    //  0x00  unused
	4'hd: data =   1;    //  0x01  protocol revision
	4'he: data =  41;    //  0x29  CRC high
	4'hf: data = 196;    //  0xc4  CRC low
endcase

endmodule

HierarchyFilesModulesSignalsTasksFunctionsHelp

This page: Maintained by: ldoolitt@recycle.lbl.gov
Created:Wed May 19 11:23:04 2004
From: config_romx_mebt.v

Verilog converted to html by v2html 7.30 (written by Costas Calamvokis).Help