LLRF_SYNTH = ../design_top.v ../error3.v ../fdbk_loop.v \
             ../flasher.v ../kcm.v ../ramdp1024x12.v \
             ../ramdp1024x32.v ../sport.v ../rf_timer.v

XILINX_MODELS = ../xilinx/RAMB4_S4_S4.v  ../xilinx/RAMB4_S8_S8.v \
                ../xilinx/SRL16E.v

VPATH=.:..:../xilinx

CFLAGS = -Wall

all: messagev.vpi nanoengine llrf kcm

messagev.vpi: messagev.c
	iverilog-vpi $<

sysmodel_vpi.vpi: sysmodel_vpi.c step7i.c
	iverilog-vpi $^

kcm: kcm_tb.v ../kcm.v ../srl16x16e.v ../xilinx/SRL16E.v
	iverilog -Wall -DSIMULATE $^ -o $@

kcm_test: kcm kcm_test.sh
	sh kcm_test.sh

nanoengine: ntest.v nanoengine.v
	iverilog -Wall $^ -o $@

nanoengine_test: nanoengine messagev.vpi nanoengine_test.sh exercise2.dat
	sh nanoengine_test.sh

llrf: main.v nanoengine.v $(LLRF_SYNTH) $(XILINX_MODELS)
	iverilog -Wall $^ -o $@

llrf_test: llrf messagev.vpi llrf_test.sh exercise3.dat
	sh llrf_test.sh

epics_test: llrf messagev.vpi sysmodel_vpi.vpi epics_test.sh ../epics/test_llrf
	sh epics_test.sh

# ../adf4xxx.v ../sport1.v
# ../history.v ../ramdp1024x12.v ../ramdp1024x32.v ../xilinx/RAMB4_S4_S4.v
# ../history2k.v ../hist4.v ../ramdp2048x14.v ../srl16x14e.v ../xilinx/RAMB4_S2_S2.v
adctest: adctest_tb.v nanoengine.v ../adctest.v ../xilinx/glbl.v ../flasher.v ../rf_timer.v \
         ../ds2401.v ../altsport.v \
         ../dac_testpattern.v ../afterburner.v ../kcm.v \
         ../fdbk_loop.v ../error3.v ../feedforward.v \
         ../dds.v ../cordic.v \
         ../srl16x12e.v ../srl16x16e.v \
         ../history2e.v ../hist2.v ../histmode.v ../ramdp512x16.v ../srl16x19e.v \
         ../xilinx/RAMB4_S8_S8.v \
         ../xilinx/IBUF.v ../xilinx/BUFG.v ../xilinx/SRL16E.v
	iverilog -DSIMULATE -Wall $^ -o $@

adctest_test: adctest messagev.vpi adctest_test.sh adctest_exercise.dat
	sh adctest_test.sh

altsport: altsport_tb.v ../altsport.v
	iverilog -Wall $^ -o $@

sportx: sportx_tb.v ../sportx.v
	iverilog -DSIMULATE -Wall $^ -o $@

cordic: cordic_tb.v ../cordic.v
	iverilog -Wall $^ -o $@

cordic.dat: cordic
	./cordic >$@

cordic_test: cordic_test.awk cordic.dat
	awk -f $^

dds: dds_tb.v ../dds.v ../cordic.v
	iverilog -Wall $^ -o $@

dds_fixed: dds_tb.v ../dds.v
	iverilog -DUNADJUSTABLE -Wall $^ -o $@

fdbk_loop: fdbk_loop_tb.v ../kcm.v ../fdbk_loop.v ../error3.v ../xilinx/SRL16E.v
	iverilog -DSIMULATE -Wall $^ -o $@

fdbk_loop2: fdbk_loop2_tb.v ../dds.v ../cordic.v ../kcm.v ../fdbk_loop.v ../error3.v ../srl16x16e.v ../xilinx/SRL16E.v
	iverilog -DSIMULATE -Wall $^ -o $@

fdbk_loop3: fdbk_loop3_tb.v kcm.v fdbk_loop.v error3.v srl16x16e.v SRL16E.v
	iverilog -DSIMULATE -Wall $^ -o $@

# input waveform for history buffer test
given.dat: given_g.m
	octave -q $^ >$@

history_tb: history_tb.v
	iverilog -Wall -y .. -y ../xilinx $^ -o $@

afterburner_tb: afterburner_tb.v ../afterburner.v ../kcm.v ../srl16x16e.v ../xilinx/SRL16E.v
	iverilog -Wall -DSIMULATE afterburner_tb.v ../afterburner.v ../kcm.v ../srl16x16e.v ../xilinx/SRL16E.v -o $@

hist_in: hist_in.o

tidy:
	rm -f core cmd_fifo? a.out

clean: tidy
	rm -f *.vcd *.vpi *.o
	rm -f nanoengine kcm llrf adctest altsport sportx cordic
	rm -f fdbk_loop fdbk_loop2 cordic.dat adctest_test.log
	rm -f pulse_out_*.dat hist_in history_tb given.dat