JTAG Base Layer

This is a first attempt to make a software base layer for host-side access to JTAG Test Access Ports. Most people seem to roll their own, but that duplicates work, especially when it comes to portability across JTAG access adapters, and debugging or autodetecting multiple devices on the chain. Lazy bum that I am, I'd like everyone to pull together on some JTAG layer, so I can have access to well debugged source code when I need it. I respectfully offer this one as a start.

The following material is abridged from the README file in jtag-util-0.03.tar.gz.

Hardware that this code intends to cover (support is the wrong word, since I (quoting from the GPL) PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, yadda, yadda, yadda) is at least:

• Xilinx Parallel Cable III
• Altera ByteBlaster
• XESS XSP/XS40/XS95
• Macriagor Wiggler

Existing free software projects that incorporate JTAG:

• naxjp
• jtagprog
• ianjtag tools
• arm-boot
• gdbice
• jtag-arm9
• LART
• PLEB's Anvil
• jtagmap
• JTAG tools

Existing pseudo-commercial products that publish source:

• XESS xstools
• Altera JAM player
• Xilinx SVF player (see XAPP-058)

Xilinx Answer 11857 explains how to identify devices in an unknown chain.

Larry Doolittle
October 12, 2001