diff -ur --exclude=pcblib pcb-20040903/lib/bga.inc pcb-20040903-bga/lib/bga.inc
--- pcb-20040903/lib/bga.inc	2003-02-19 16:23:22.000000000 -0800
+++ pcb-20040903-bga/lib/bga.inc	2004-11-23 16:56:29.000000000 -0800
@@ -4,23 +4,31 @@
 # $1: canonical name
 # $2: name on PCB
 # $3: value
-# $4: number of pins along outer edge
+# $4: number of balls along outer edge
 # $5: number of rows
+# $6: ball pitch
+# $7: ball diameter
+# ball numbering is a total disaster
 #
-define(`PKG_BGA',
+define(`COMMON_PKG_BGA',
 	`define(`XBLOCK', `$4')
 	define(`YBLOCK', `$5')
-	define(`PITCH', `50')
-	define(`DIAMETER', `25')
+	define(`PITCH', `$6')
+	define(`DIAMETER', `$7')
 	define(`NUMPINS', `eval(4*(XBLOCK-4)*YBLOCK)')
 Element(0x00 "$1" "$2" "$3" 100 0 0 100 0x00)
 (
+	define(`count', 1)
 	forloop(`i', 0, eval(XBLOCK-1),
 		`forloop(`j', 0, eval(YBLOCK-1),
-			`PAD(eval(i*PITCH), eval(j*PITCH), eval(i*PITCH), eval(j*PITCH), DIAMETER, 1)'
-			`PAD(eval((XBLOCK+YBLOCK-j-1)*PITCH), eval(i*PITCH), eval((XBLOCK+YBLOCK-j-1)*PITCH), eval(i*PITCH), DIAMETER, 1)'
-			`PAD(eval((XBLOCK+YBLOCK-i-1)*PITCH), eval((XBLOCK+YBLOCK-j-1)*PITCH), eval((XBLOCK+YBLOCK-i-1)*PITCH), eval((XBLOCK+YBLOCK-j-1)*PITCH), DIAMETER, 1)'
-			`PAD(eval(j*PITCH), eval((XBLOCK+YBLOCK-i-1)*PITCH), eval(j*PITCH), eval((XBLOCK+YBLOCK-i-1)*PITCH), DIAMETER, 1)'
+			`Pad(eval(i*PITCH) eval(j*PITCH) eval(i*PITCH) eval(j*PITCH) DIAMETER "count" 0x00)'
+			`define(`count',incr(count))'
+			`Pad(eval((XBLOCK+YBLOCK-j-1)*PITCH) eval(i*PITCH) eval((XBLOCK+YBLOCK-j-1)*PITCH) eval(i*PITCH) DIAMETER "count" 0x00)'
+			`define(`count',incr(count))'
+			`Pad(eval((XBLOCK+YBLOCK-i-1)*PITCH) eval((XBLOCK+YBLOCK-j-1)*PITCH) eval((XBLOCK+YBLOCK-i-1)*PITCH) eval((XBLOCK+YBLOCK-j-1)*PITCH) DIAMETER "count" 0x00)'
+			`define(`count',incr(count))'
+			`Pad(eval(j*PITCH) eval((XBLOCK+YBLOCK-i-1)*PITCH) eval(j*PITCH) eval((XBLOCK+YBLOCK-i-1)*PITCH) DIAMETER "count" 0x00)'
+			`define(`count',incr(count))'
 		)'
 	)
 	ElementLine(eval(-PITCH/2) eval(-1*PITCH) eval((XBLOCK+YBLOCK)*PITCH) eval(-1*PITCH) 10)
@@ -32,4 +40,144 @@
 	Mark(eval((YBLOCK+1)*PITCH) eval((YBLOCK+1)*PITCH))
 )')
 
+define(`PKG_BGA_1156',
+	`COMMON_PKG_BGA(`$1', `$2', `$3', 17, 17, 40, 20)')
+
+define(`PKG_BGA_192',
+	`COMMON_PKG_BGA(`$1', `$2', `$3', 16, 3, 50, 25)')
+
+define(`PKG_CBGA_256',
+	`COMMON_PKG_BGA(`$1', `$2', `$3', 8, 8, 40, 20)')
+
+define(`PKG_BGA_225',
+	`COMMON_PKG_BGA(`$1', `$2', `$3', 8, 7, 40, 20)')
+
+define(`PKG_BGA_456',
+	`COMMON_PKG_BGA(`$1', `$2', `$3', 15, 7, 40, 20)')
+
+# Relatively close to a Micron MT46VxxFG (e.g., MT46V16M16FG) or -BG (lead-free)
+# biggest problem now (I think) is the 40 mil pitch approximation to 1.0 mm
+#
+# define(`ram60pin',`Pad($3 eval($1*40-40) $3 eval($1*40-40) DIAMETER "$4`$2'" 0x00)
+define(`ram60pin',`Pad($3 eval((($1-1)*10000+127)/254) $3 eval((($1-1)*10000+127)/254) DIAMETER "$4`$2'" 0x00)
+')
+define(`PKG_BGA_RAM60',
+	`DefinePinList(A,B,C,D,E,F,G,H,J,K,L,M)
+	define(`DIAMETER', 18)
+Element(0x00 "$1" "$2" "$3" 100 0 0 100 0x00)
+(
+	forloop(`i',1, 6,`ram60pin(i,1,  0,`P_'i)')
+	forloop(`i',1,12,`ram60pin(i,2, 31,`P_'i)')
+	forloop(`i',1,12,`ram60pin(i,3, 63,`P_'i)')
+	forloop(`i',1,12,`ram60pin(i,7,189,`P_'i)')
+	forloop(`i',1,12,`ram60pin(i,8,220,`P_'i)')
+	forloop(`i',1, 6,`ram60pin(i,9,252,`P_'i)')
+        ElementLine(-31 -59 -31 492 10)
+        ElementLine(-31 492 283 492 10)
+        ElementLine(283 492 283 -59 10)
+        ElementLine(283 -59 -31 -59 10)
+        Mark(0 0)
+)')
 # -------------------------------------------------------------------
+
+
+define(`XBGA_ROW',`
+	define(`row_num',$1)
+	define(`row_y',$2)
+	define(`pitch',$3)
+	_XBGA_ROW(shift(shift(shift($@)))
+')
+
+# Clearance of 3000 is 200*GROUNDPLANEFRAME
+# Mask of 600 is 2*MASKFRAME
+define(`_XBGA_ROW',`ifelse($#, 0, , $#, 1, `NEXT_XBGA_PAD(`$1')',
+	`NEXT_XBGA_PAD(`$1')
+	_XBGA_ROW(shift($@))')')
+define(`NEXT_XBGA_PAD',`define(`count', incr(count))' XBGA_PAD(`row_y',`eval(((count-1)*PITCH*100+127)/254)', $1, row_num))
+define(`XBGA_PAD',`ifelse($3, , , `define(`kount', incr(kount))' `Pad[$1 $2 $1 $2 DIAMETER 3000 eval(DIAMETER+600) "$3$4" "kount" 0x00]')')
+define(`NEXT_XBGA_ROW',
+	`define(`row_num', incr(row_num))
+	define(`row_y', eval(((row_num-1)*PITCH*100+127)/254))
+	define(`count',0)
+	_XBGA_ROW($@)')
+
+define(`XBGA_OUT',`
+	dnl  Three corners cut, not the one next to the A1 pad
+	define(`a1m',`eval($1-40)')
+        ElementLine(-39 -39 -39 a1m 10)
+	ElementLine(-39 a1m   1 $1  10)
+        ElementLine(  1 $1  a1m $1  10)
+	ElementLine(a1m $1  $1  a1m 10)
+        ElementLine($1  a1m $1   1  10)
+	ElementLine($1    1 a1m -39 10)
+        ElementLine(a1m -39 -39 -39 10)
+	')
+
+define(`PKG_XILINX_FT256',`
+	define(`DIAMETER', 1575)
+	define(`PITCH',10000)
+	define(`row_num',0)
+Element[0x00 "$1" "$2" "$3" 0 0 100 0 0 100 0x00]
+	(
+	define(`kount',0)
+	forloop(`m',1,16,`NEXT_XBGA_ROW(A,B,C,D,E,F,G,H,J,K,L,M,N,P,R,T)')
+	XBGA_OUT(630)
+)
+	')
+
+define(`PKG_XILINX_FG320',`
+	define(`DIAMETER', 1575)
+	define(`PITCH',10000)
+	define(`row_num',0)
+Element[0x00 "$1" "$2" "$3" 0 0 100 0 0 100 0x00]
+	(
+	define(`kount',0)
+	forloop(`m',1,8,`NEXT_XBGA_ROW(A,B,C,D,E,F,G,H,J,K,L,M,N,P,R,T,U,V)')
+	forloop(`m',1,2,`NEXT_XBGA_ROW(A,B,C,D,E,F,G,H, , ,L,M,N,P,R,T,U,V)')
+	forloop(`m',1,8,`NEXT_XBGA_ROW(A,B,C,D,E,F,G,H,J,K,L,M,N,P,R,T,U,V)')
+	XBGA_OUT(709)
+)
+	')
+
+define(`PKG_XILINX_FG456',`
+	define(`DIAMETER', 1575)
+	define(`PITCH',10000)
+	define(`row_num',0)
+Element[0x00 "$1" "$2" "$3" 0 0 100 0 0 100 0x00]
+	(
+	define(`kount',0)
+	forloop(`m',1,7,`NEXT_XBGA_ROW(A,B,C,D,E,F,G,H,J,K,L,M,N,P,R,T,U,V,W,Y,AA,AB)')
+        	         NEXT_XBGA_ROW(A,B,C,D,E,F,G, , , , , , , , ,T,U,V,W,Y,AA,AB)
+	forloop(`m',1,6,`NEXT_XBGA_ROW(A,B,C,D,E,F,G, ,J,K,L,M,N,P, ,T,U,V,W,Y,AA,AB)')
+	                 NEXT_XBGA_ROW(A,B,C,D,E,F,G, , , , , , , , ,T,U,V,W,Y,AA,AB)
+	forloop(`m',1,7,`NEXT_XBGA_ROW(A,B,C,D,E,F,G,H,J,K,L,M,N,P,R,T,U,V,W,Y,AA,AB)')
+	XBGA_OUT(866)
+)
+	')
+
+define(`PKG_XILINX_FG676',`
+	define(`DIAMETER', 1575)
+	define(`PITCH',10000)
+	define(`row_num',0)
+Element[0x00 "$1" "$2" "$3" 0 0 100 0 0 100 0x00]
+	(
+	define(`kount',0)
+	forloop(`m',1,26,`NEXT_XBGA_ROW(A,B,C,D,E,F,G,H,J,K,L,M,N,P,R,T,U,V,W,Y,AA,AB,AC,AD,AE,AF)')
+	XBGA_OUT(1024)
+)
+	')
+
+define(`PKG_XILINX_SF363',`
+	define(`DIAMETER', 1300)
+	define(`PITCH',8000)
+	define(`row_num',0)
+Element[0x00 "$1" "$2" "$3" 0 0 100 0 0 100 0x00]
+	(
+	define(`kount',0)
+	                 NEXT_XBGA_ROW( ,B,C,D,E,F,G,H,J,K,L,M,N,P,R,T,U,V,W,Y)  
+	forloop(`m',1,6,`NEXT_XBGA_ROW(A,B,C,D,E,F,G,H,J,K,L,M,N,P,R,T,U,V,W,Y)')
+	forloop(`m',1,6,`NEXT_XBGA_ROW(A,B,C,D,E,F,G, , , , , , ,P,R,T,U,V,W,Y)')
+	forloop(`m',1,7,`NEXT_XBGA_ROW(A,B,C,D,E,F,G,H,J,K,L,M,N,P,R,T,U,V,W,Y)')
+	XBGA_OUT(630)
+)
+	')
diff -ur --exclude=pcblib pcb-20040903/lib/connector.inc pcb-20040903-bga/lib/connector.inc
--- pcb-20040903/lib/connector.inc	2004-02-18 19:10:36.000000000 -0800
+++ pcb-20040903-bga/lib/connector.inc	2004-11-23 16:56:29.000000000 -0800
@@ -677,9 +677,9 @@
 
 # ---------------------------------------------------------------
 # definition for a Molex high density connector, 53467/53645
-# Board-to-Board 0.635mm (0.25") Ptich Plug - SMT Dual Row, Vertical Stacking
+# Board-to-Board 0.635mm (0.025") Pitch Plug - SMT Dual Row, Vertical Stacking
 # Reference: http://www.molex.com/product/micro/53467.html
-# 4/01 Larry Doolittle <LRDoolittle@lbl.gov>
+# 4/2001 Larry Doolittle <LRDoolittle@lbl.gov>
 #
 # $1: canonical name
 # $2: name on PCB
@@ -722,7 +722,7 @@
 # ---------------------------------------------------------------
 # definition for a Bright Star nanoEngine, StrongARM single board computer
 # Reference: http://www.brightstar.com/arm/nanoman.pdf
-# 4/01 Larry Doolittle <LRDoolittle@lbl.gov>
+# 4/2001 Larry Doolittle <LRDoolittle@lbl.gov>
 #
 # $1: canonical name
 # $2: name on PCB
@@ -742,6 +742,91 @@
 	`PKG_MOLEX_025($1, $2, $3, 160)'
 )
 
+# slightly generalized definition used below
+# for a double-row connector
+# $1: number of pin pairs
+# $2: pitch in .1 micrometers (254 of these units is 1 mil)
+# $3: pad width (mils)
+# $4: distance (mils) from center line to outer edge
+# $5: distance (mils) from center line to inner edge
+#
+# when run, defines ENDY as the y distance to the last pin pair (mils)
+
+define(`CONNECTOR_DOUBLE_ROW_PADS',`
+	forloop(`i', 1, $1,
+		`define(`Y', eval(($2*(i-1)+127)/254) )'
+		`PAD(  $5, Y,  $4, Y, $3, eval(i*2-1))'
+		`PAD( -$4, Y, -$5, Y, $3, eval(i*2))'
+	)
+	define(`ENDY',eval(($2*($1-1)+127)/254))
+')
+
+# ---------------------------------------------------------------
+# definition for an AMP high density connector pair, 179010 and 179031
+# Board-to-Board 0.80mm (0.0315") Pitch Plug - SMT Dual Row, Vertical Stacking
+# 11/2004 Larry Doolittle <LRDoolittle@lbl.gov>
+#
+# $1: canonical name
+# $2: name on PCB
+# $3: value
+# $4: pins
+#
+# base is on the symmetry line, between pins 1 and 2
+#
+
+
+define(`PKG_AMP_179010',
+	`define(`PINPAIRS',`eval($4/2)')
+Element(0x00 "$1" "$2" "$3" 0 0 3 100 0x00)
+(
+
+define(ALIGN1,48)
+define(ALIGN2,31)
+define(OUTER,142)
+define(INNER,47)
+
+        CONNECTOR_DOUBLE_ROW_PADS(PINPAIRS, 8000, 19, OUTER, INNER)
+
+	# Keying is done with two sizes of alignment pins:
+	# 1.2 and 0.8 mm (48 and 31 mils)
+	Pin(0          -98  eval(ALIGN1+15) ALIGN1 "M1" 0x01)
+	Pin(0 eval(ENDY+98) eval(ALIGN2+15) ALIGN2 "M2" 0x01)
+
+	define(`BOXY',eval(ENDY+150))
+	ElementLine(-100 -150   50 -150 10)
+	ElementLine(  50 -150  100 -100 10)
+	ElementLine( 100 -100  100 BOXY 10)
+	ElementLine( 100 BOXY -100 BOXY 10)
+	ElementLine(-100 BOXY -100 -150 10)
+
+)')
+
+define(`PKG_AMP_179031',
+	`define(`PINPAIRS',`eval($4/2)')
+Element(0x00 "$1" "$2" "$3" 0 0 3 100 0x00)
+(
+
+define(ALIGN1,31)
+define(ALIGN2,48)
+define(OUTER,126)
+define(INNER,47)
+
+        CONNECTOR_DOUBLE_ROW_PADS(PINPAIRS, 8000, 19, OUTER, INNER)
+
+	# Keying is done with two sizes of alignment pins:
+	# 1.2 and 0.8 mm (48 and 31 mils)
+	Pin(0          -98  eval(ALIGN1+15) ALIGN1 "M1" 0x01)
+	Pin(0 eval(ENDY+98) eval(ALIGN2+15) ALIGN2 "M2" 0x01)
+
+	define(`BOXY',eval(ENDY+150))
+	ElementLine(-100 -150   50 -150 10)
+	ElementLine(  50 -150  100 -100 10)
+	ElementLine( 100 -100  100 BOXY 10)
+	ElementLine( 100 BOXY -100 BOXY 10)
+	ElementLine(-100 BOXY -100 -150 10)
+
+)')
+
 # -------------------------------------------------------------------
 # the definition of a through hole test point
 # $1: canonical name
@@ -764,3 +849,45 @@
 	# Mark at the common centroid
         Mark(0 0)
 )')
+
+# -------------------------------------------------------------------
+# the definition of an RJ-45 approximate connector
+# $1: canonical name
+# $2: name on PCB
+# $3: value
+#
+define(`PKG_RJ45',
+`
+        define(`PITCH', `100')
+        define(`NPINS', `eval($4)')
+        define(`SILKW', `10')
+        define(`SILKXOFS', `75')
+        define(`SILKYOFS', `115')
+        define(`SILKX1', `-SILKXOFS')
+        define(`SILKX2', `eval((NPINS-1)*PITCH + SILKXOFS)')
+        define(`SILKY1', `-SILKYOFS')
+        define(`SILKY2', `SILKYOFS')
+        define(`SILKY3', `eval(SILKYOFS+2*SILKW)')
+
+Element(0x00 "$1" "$2" "$3" 0  140 0 150 0x00)
+(
+	PIN(  0,   0, 55, 35, 1)
+	PIN( 50, 100, 55, 35, 2)
+	PIN(100,   0, 55, 35, 3)
+	PIN(150, 100, 55, 35, 4)
+	PIN(200,   0, 55, 35, 5)
+	PIN(250, 100, 55, 35, 6)
+	PIN(300,   0, 55, 35, 7)
+	PIN(350, 100, 55, 35, 8)
+	# Keying holes
+        Pin(-50 -250 168 128 "M1" 0x01)
+        Pin(400 -250 168 128 "M2" 0x01)
+
+        ElementLine(-150 -500 -150  150 10)
+        ElementLine(-150  150  500  150 10) 
+        ElementLine( 500  150  500 -500 10) 
+        ElementLine( 500 -500 -150 -500 10) 
+
+        Mark(0 0)
+)')
+
diff -ur --exclude=pcblib pcb-20040903/lib/connector.list pcb-20040903-bga/lib/connector.list
--- pcb-20040903/lib/connector.list	2003-02-19 16:23:25.000000000 -0800
+++ pcb-20040903-bga/lib/connector.list	2004-11-23 16:56:29.000000000 -0800
@@ -82,6 +82,7 @@
 SUBD_25M:SUBD_MALE_LAY:25m
 BNC_rightangle:BNC_LAY:1
 MTA_156_2:MTA_156:2
+MTA_156_4:MTA_156:4
 SMA_vertical:SMA_VERT:1
 MOLEX_025_20:MOLEX_025:20
 MOLEX_025_30:MOLEX_025:30
@@ -100,4 +101,7 @@
 MOLEX_025_200:MOLEX_025:200
 MOLEX_025_240:MOLEX_025:240
 NANOENGINE:NANOENGINE:160
+AVBUS_PLUG:AMP_179010:140
+AVBUS_JACK:AMP_179031:140
+RJ45:RJ45:8
 
diff -ur --exclude=pcblib pcb-20040903/lib/connector.m4 pcb-20040903-bga/lib/connector.m4
--- pcb-20040903/lib/connector.m4	2003-02-19 16:23:26.000000000 -0800
+++ pcb-20040903-bga/lib/connector.m4	2004-11-23 16:56:29.000000000 -0800
@@ -246,6 +246,9 @@
 define(`Description_MTA_156_2', `MTA-156 header')
 define(`Param1_MTA_156_2', 2)
 
+define(`Description_MTA_156_4', `MTA-156 header')
+define(`Param1_MTA_156_4', 4)
+
 define(`Description_SMA_vertical', `vertical SMA')
 
 define(`Molex_025_style',
@@ -271,4 +274,14 @@
 
 define(`Description_NANOENGINE', `Bright Star nanoEngine SBC')
 
+define(`Description_AVBUS_PLUG', `AvBus plug, AMP 179010')
+define(`Param1_AVBUS_PLUG', 140)
+
+define(`Description_AVBUS_JACK', `AvBus jack, AMP 179031')
+define(`Param1_AVBUS_JACK', 140)
+
+define(`Description_RJ45', `board mount RJ45')
+
+define(`Description_RJ45', `board mount RJ45')
+
 divert(0)dnl
diff -ur --exclude=pcblib pcb-20040903/lib/genericsmt.list pcb-20040903-bga/lib/genericsmt.list
--- pcb-20040903/lib/genericsmt.list	2003-02-19 16:23:29.000000000 -0800
+++ pcb-20040903-bga/lib/genericsmt.list	2004-11-23 16:56:29.000000000 -0800
@@ -5,8 +5,15 @@
 SMT_1206_CAP_RES:GENERIC_SMT:3100,1550,450
 SMT_2010_CAP_RES:GENERIC_SMT:5000,2500,650
 SMT_2512_CAP_RES:GENERIC_SMT:6400,3200,750
-
-
-
-
+BGA_1156:BGA_1156:BGA1156
+BGA_192:BGA_192:BGA192
+CBGA_256:CBGA_256:CBGA256
+BGA_225:BGA_225:BGA225
+BGA_456:BGA_456:BGA456
+BGA_RAM60:BGA_RAM60:BGA60
+XILINX_FT256:XILINX_FT256:XILINX_FT256
+XILINX_FG320:XILINX_FG320:XILINX_FG320
+XILINX_SF363:XILINX_SF363:XILINX_SF363
+XILINX_FG456:XILINX_FG456:XILINX_FG456
+XILINX_FG676:XILINX_FG676:XILINX_FG676
 
diff -ur --exclude=pcblib pcb-20040903/lib/genericsmt.m4 pcb-20040903-bga/lib/genericsmt.m4
--- pcb-20040903/lib/genericsmt.m4	2003-02-19 16:23:29.000000000 -0800
+++ pcb-20040903-bga/lib/genericsmt.m4	2004-11-23 16:56:29.000000000 -0800
@@ -12,6 +12,17 @@
 define(`Description_SMT_1206_CAP_RES',`SMT 1206 type capicitor/resistor')
 define(`Description_SMT_2010_CAP_RES',`SMT 2010 type capicitor/resistor')
 define(`Description_SMT_2512_CAP_RES',`SMT 2512 type capicitor/resistor')
+define(`Description_BGA_1156',`Almost an XC2VPxx-xFF1152')
+define(`Description_BGA_456',`Almost a XC2VPxx-xFG456')
+define(`Description_BGA_192',`MAX10x ADC')
+define(`Description_CBGA_256',`Atmel TS8101G2 DAC')
+define(`Description_BGA_225',`Almost a CY7C1386')
+define(`Description_BGA_RAM60',`Almost a MT46V16M16')
+define(`Description_XILINX_FT256',`Xilinx FT256 BGA')
+define(`Description_XILINX_FG320',`Xilinx FG320 BGA')
+define(`Description_XILINX_SF363',`Xilinx SF363 BGA')
+define(`Description_XILINX_FG456',`Xilinx FG456 BGA')
+define(`Description_XILINX_FG676',`Xilinx FG676 BGA')
 divert(0)dnl
 
 
diff -ur --exclude=pcblib pcb-20040903/lib/pcblib.contents pcb-20040903-bga/lib/pcblib.contents
--- pcb-20040903/lib/pcblib.contents	2004-09-02 21:33:23.000000000 -0700
+++ pcb-20040903-bga/lib/pcblib.contents	2004-11-23 17:00:22.000000000 -0800
@@ -352,6 +352,7 @@
 SUBD_25M:SUBD_MALE_LAY:25m:SUB-D male 25 pins
 BNC_rightangle:BNC_LAY:1:right angle BNC
 MTA_156_2:MTA_156:2:MTA-156 header
+MTA_156_4:MTA_156:4:MTA-156 header
 SMA_vertical:SMA_VERT:1:vertical SMA
 MOLEX_025_20:MOLEX_025:20:Molex .025 pitch 20 pin plug
 MOLEX_025_30:MOLEX_025:30:Molex .025 pitch 30 pin plug
@@ -370,6 +371,9 @@
 MOLEX_025_200:MOLEX_025:200:Molex .025 pitch 200 pin plug
 MOLEX_025_240:MOLEX_025:240:Molex .025 pitch 240 pin plug
 NANOENGINE:NANOENGINE:160:Bright Star nanoEngine SBC
+AVBUS_PLUG:AMP_179010:140:AvBus plug, AMP 179010
+AVBUS_JACK:AMP_179031:140:AvBus jack, AMP 179031
+RJ45:RJ45:8:board mount RJ45
 TYPE=~crystal
 crystal_300:CRYSTAL:1MHz:crystal 300mil
 crystal_300:CRYSTAL:8MHZ:crystal 300mil
@@ -493,6 +497,17 @@
 SMT_1206_CAP_RES:GENERIC_SMT:3100,1550,450:SMT 1206 type capicitor/resistor
 SMT_2010_CAP_RES:GENERIC_SMT:5000,2500,650:SMT 2010 type capicitor/resistor
 SMT_2512_CAP_RES:GENERIC_SMT:6400,3200,750:SMT 2512 type capicitor/resistor
+BGA_1156:BGA_1156:BGA1156:Almost an XC2VPxx-xFF1152
+BGA_192:BGA_192:BGA192:MAX10x ADC
+CBGA_256:CBGA_256:CBGA256:Atmel TS8101G2 DAC
+BGA_225:BGA_225:BGA225:Almost a CY7C1386
+BGA_456:BGA_456:BGA456:Almost a XC2VPxx-xFG456
+BGA_RAM60:BGA_RAM60:BGA60:Almost a MT46V16M16
+XILINX_FT256:XILINX_FT256:XILINX_FT256:Xilinx FT256 BGA
+XILINX_FG320:XILINX_FG320:XILINX_FG320:Xilinx FG320 BGA
+XILINX_SF363:XILINX_SF363:XILINX_SF363:Xilinx SF363 BGA
+XILINX_FG456:XILINX_FG456:XILINX_FG456:Xilinx FG456 BGA
+XILINX_FG676:XILINX_FG676:XILINX_FG676:Xilinx FG676 BGA
 TYPE=~gtag
 cy7c64603_qfp:PQFP52_10X10:cy7c64603:USB Microcontroller
 conn_usb:CONN_USB:conn_usb:USB Male Connector
diff -ur --exclude=pcblib pcb-20040903/src/djopt.c pcb-20040903-bga/src/djopt.c
--- pcb-20040903/src/djopt.c	2004-08-29 20:13:14.000000000 -0700
+++ pcb-20040903-bga/src/djopt.c	2005-12-05 14:03:36.602143280 -0800
@@ -275,11 +275,13 @@
   return n - n % (int) (Settings.Grid);
 }
 
+#if 0
 static int
 abs (int x)
 {
   return x > 0 ? x : -x;
 }
+#endif
 
 static int
 max (int x, int y)
diff -ur --exclude=pcblib pcb-20040903/src/find.c pcb-20040903-bga/src/find.c
--- pcb-20040903/src/find.c	2004-08-30 04:26:23.000000000 -0700
+++ pcb-20040903-bga/src/find.c	2005-11-22 13:21:23.000000000 -0800
@@ -913,7 +913,7 @@
 	{
 	  SET_FLAG (WARNFLAG, pv);
 	  Settings.RatWarn = True;
-	  Message ("WARNING: Hole too clost to line.\n");
+	  Message ("WARNING: Hole too close to line.\n");
 	}
       if (ADD_PV_TO_LIST (pv))
 	longjmp (i->env, 1);
diff -ur --exclude=pcblib pcb-20040903/src/pcb-menu.res pcb-20040903-bga/src/pcb-menu.res
--- pcb-20040903/src/pcb-menu.res	2004-08-24 19:36:34.000000000 -0700
+++ pcb-20040903-bga/src/pcb-menu.res	2005-12-01 07:17:51.000000000 -0800
@@ -58,7 +58,9 @@
         {"0.5 mil" SetValue(Grid,50) CheckWhen(grid,50)}
         {"1 mil" SetValue(Grid,100) CheckWhen(grid,100)}
         {"0.1 mm" SetValue(Grid,393.7007874) CheckWhen(grid,393)}
+	{"0.25 mm" SetValue(Grid,984.2519685) CheckWhen(grid,984}}
         {"10 mil" SetValue(Grid,1000) CheckWhen(grid,1000)}
+        {"0.5 mm" SetValue(Grid,1968.503937) CheckWhen(grid,1968)}
         {"1 mm" SetValue(Grid,3937.007874) CheckWhen(grid,3937)}
         {"25 mil" SetValue(Grid,2500) CheckWhen(grid,2500)}
         {"50 mil" SetValue(Grid,5000) CheckWhen(grid,5000)}
diff -ur --exclude=pcblib pcb-20040903/src/rats.c pcb-20040903-bga/src/rats.c
--- pcb-20040903/src/rats.c	2004-08-29 19:52:04.000000000 -0700
+++ pcb-20040903-bga/src/rats.c	2005-12-04 19:47:54.000000000 -0800
@@ -125,13 +125,10 @@
 
   if ((element = SearchElementByName (PCB->Data, ElementName)) != NULL)
     {
-      for (i = 0; i < element->PadN; i++)
-	if (strcmp (PinNum, element->Pad[i].Number) == 0 && (!Same
-							     ||
-							     !TEST_FLAG
-							     (DRCFLAG,
-							      &element->
-							      Pad[i])))
+      for (i = 0; i < element->PadN; i++) {
+	PadTypePtr p = element->Pad+i;
+	const char *n = (p->Name) ? (p->Name) : (p->Number);
+	if (strcmp (PinNum, n) == 0 && (!Same || !TEST_FLAG (DRCFLAG, p)))
 	  {
 	    conn->type = PAD_TYPE;
 	    conn->ptr2 = &element->Pad[i];
@@ -149,12 +146,14 @@
 	      }
 	    break;
 	  }
+      }
       if (i == element->PadN)
 	{
-	  for (i = 0; i < element->PinN; i++)
+	  for (i = 0; i < element->PinN; i++) {
+	    PinTypePtr p = element->Pin+i;
+	    const char *n = (p->Name) ? (p->Name) : (p->Number);
 	    if (!TEST_FLAG (HOLEFLAG, &element->Pin[i]) &&
-		strcmp (PinNum, element->Pin[i].Number) == 0 &&
-		(!Same || !TEST_FLAG (DRCFLAG, &element->Pin[i])))
+		strcmp (PinNum, n) == 0 && (!Same || !TEST_FLAG (DRCFLAG, p)))
 	      {
 		conn->type = PIN_TYPE;
 		conn->ptr2 = &element->Pin[i];
@@ -163,6 +162,7 @@
 		conn->Y = element->Pin[i].Y;
 		break;
 	      }
+	  }
 	  if (i == element->PinN)
 	    return (False);
 	}
@@ -185,6 +185,7 @@
 
   if (ParseConnection (entry->ListEntry, ElementName, PinNum))
     return (False);
+  /* fprintf(stderr, "Debug: SeekPad searching for (%s)-(%s)\n", ElementName, PinNum); */
   for (j = 0; PinNum[j] != '\0'; j++);
   if (j == 0)
     {
@@ -411,9 +412,11 @@
 	warn = True;
 	if (!pad->Spare)
 	  {
+	    const char *p = UNKNOWN(pad->Name);
+	    if (!p || *p!='\0') p = UNKNOWN(pad->Number);
 	    Message ("WARNING!! net \"%s\" is shorted"
 		     " to %s pad %s\n", &theNet->Name[2],
-		     UNKNOWN(NAMEONPCB_NAME (element)), UNKNOWN(pad->Number));
+		     UNKNOWN(NAMEONPCB_NAME (element)), p);
 	    SET_FLAG (WARNFLAG, pad);
 	    continue;
 	  }
