% xdvi -paper 10.63x7.95in foils -geom 800x600 -s 4
\magnification=\magstep2
\nopagenumbers
\input epsf
\hsize=9.2truein
\hoffset=-0.5truein
\vsize=6.5truein
\voffset=-0.5truein
\parindent=0pt
\parskip=6pt
\def\i{\par $\bullet$ }

\font\big=cmb12 scaled \magstep1

\font\bigger=cmb12 scaled \magstep3

\centerline{\bigger EMBEDDED NETWORKED FRONT ENDS -}
\bigskip
\centerline{\bigger BEYOND THE CRATE}

\bigskip
\centerline{\big Lawrence R. Doolittle, LBNL, Berkeley, CA 94720, USA}

\bigskip
This work is supported by the Director, Office of Science, Office of
Basic Energy Sciences, of the U.S. Department of Energy under
Contract No. DE-AC03-76SF00098. The SNS project is being carried
out by a collaboration of six US Laboratories: Argonne National
Laboratory (ANL), Brookhaven National Laboratory (BNL), Thomas
Jefferson National Accelerator Facility (TJNAF), Los Alamos National
Laboratory (LANL), E. O. Lawrence Berkeley National Laboratory
(LBNL), and Oak Ridge National Laboratory (ORNL). SNS is
managed by UT-Battelle, LLC, under contract DE-AC05-00OR22725
for the U.S. Department of Energy.

\vfil\eject


\centerline{\epsfxsize=0.4\hsize\epsffile{familiar.eps}}
\centerline{Familiar block diagram.}

\vfil\eject

{\big Computers}
\i multiple sources, very competitive market
\i   usually needs additional glue
\i   usually good throughput, but unpredictable latency
\i   widely understood, everybody thinks they know how to program one

\bigskip
{\big FPGA}
\i   chip design strongly protected by patents, two vendors dominate
\i   handles glue very well
\i   some hardware overhead to configure after power-up
\i   guaranteed latency normally designed-in
\i   reputation for being difficult to program

\bye
