Digital IQ Reconstruction from a non-IQ Sampled Waveform

Larry Doolittle, LBNL, November 2008

How to digitally downconvert a stream of non-IQ-sampled IF ADC readings to IQ representation, without adding large filter delays. Tested Verilog code is included.

• Monograph in PDF form
• Kit (tar.gz) with all sources for the FPGA code and the documentation
• README for the above kit

This same math was supposedly once published by Stefan Simrock's group at DESY, but I lost the reference.

Larry Doolittle
August 13, 2011